JPH0580141B2 - - Google Patents

Info

Publication number
JPH0580141B2
JPH0580141B2 JP61149582A JP14958286A JPH0580141B2 JP H0580141 B2 JPH0580141 B2 JP H0580141B2 JP 61149582 A JP61149582 A JP 61149582A JP 14958286 A JP14958286 A JP 14958286A JP H0580141 B2 JPH0580141 B2 JP H0580141B2
Authority
JP
Japan
Prior art keywords
wafer
plating
bump
bumps
current film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61149582A
Other languages
English (en)
Japanese (ja)
Other versions
JPS636860A (ja
Inventor
Hiromi Takahashi
Yasuo Iguchi
Yoshiro Takahashi
Isao Shibata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP61149582A priority Critical patent/JPS636860A/ja
Publication of JPS636860A publication Critical patent/JPS636860A/ja
Publication of JPH0580141B2 publication Critical patent/JPH0580141B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Landscapes

  • Electrodes Of Semiconductors (AREA)
JP61149582A 1986-06-27 1986-06-27 フリップチップ用バンプ形成方法 Granted JPS636860A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61149582A JPS636860A (ja) 1986-06-27 1986-06-27 フリップチップ用バンプ形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61149582A JPS636860A (ja) 1986-06-27 1986-06-27 フリップチップ用バンプ形成方法

Publications (2)

Publication Number Publication Date
JPS636860A JPS636860A (ja) 1988-01-12
JPH0580141B2 true JPH0580141B2 (en]) 1993-11-08

Family

ID=15478348

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61149582A Granted JPS636860A (ja) 1986-06-27 1986-06-27 フリップチップ用バンプ形成方法

Country Status (1)

Country Link
JP (1) JPS636860A (en])

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0636087B2 (ja) * 1990-04-26 1994-05-11 旭光学工業株式会社 ファインダ装置およびファインダ装置を備えたカメラ
US6042953A (en) * 1996-03-21 2000-03-28 Matsushita Electric Industrial Co., Ltd. Substrate on which bumps are formed and method of forming the same
JP4493442B2 (ja) * 2004-08-24 2010-06-30 Ｏｋｉセミコンダクタ株式会社 半導体装置の製造方法及び当該製造方法に使用される製造装置
JP2007048802A (ja) * 2005-08-08 2007-02-22 Tdk Corp 配線板

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5817638A (ja) * 1981-07-24 1983-02-01 Hitachi Ltd バンプ形成装置

Also Published As

Publication number Publication date
JPS636860A (ja) 1988-01-12

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term